1. Field of the Invention
The present invention relates to a low noise block down converter (abbreviated as LNB hereinafter) of a satellite broadcast receiver.
2. Description of the Background Art
FIG. 19 is a block diagram showing a configuration of a conventional satellite broadcast receiving system.
Referring to FIG. 19, a signal having a frequency of 11.70 GHz–12.75 GHz coming from a broadcast satellite 801 is received at an antenna 801. Antenna 801 is provided with an LNB 802. LNB 802 frequency-converts weak radio waves coming from the satellite into an IF signal of 1 GHz band, amplifies the signal with low noise, and then supplies the signal to a so-called digital broadcasting (DBS) tuner 804 connected thereto. DBS tuner 804 is supplied with a signal with low noise and at a sufficient level because of the operation of LNB 802.
DBS tuner 804 processes the IF signal supplied from a coaxial cable 803 using an internal circuit and supplies the signal to a television 805.
Radio waves are received at a satellite broadcasting antenna, and the signal is introduced to an indoor DBS tuner normally using a coaxial cable. However, the radio waves received at the antenna cannot be introduced indoors directly with the coaxial cable.
A metal tube called a waveguide is required to introduce the satellite broadcast radio waves having an extremely high frequency. The use of a waveguide is not realistic since a big hole has to be made on the wall to introduce the signal from the antenna to the indoor satellite broadcast receiver and in addition much attenuation occurs.
Therefore, an LNB installed at an antenna is normally used to convert a received signal down enough for a coaxial cable to introduce so that the signal is transmitted to an indoor DBS tuner. The indoor DBS tuner contains a scramble decoder, which descrambles the signal to display an image on a television as a display device.
FIG. 20 is a block diagram of the LNB in FIG. 19.
Referring to FIG. 20, an incoming signal of 12 GHz band is received at an antenna probe 3 in a feed horn 2, is then amplified with low noise in a low noise amplifier (LNA) 5, and thereafter passes through a bandpass filter 910 having a function of passing a desired frequency band and removing a signal of an image frequency band. Thereafter, the signal passed through bandpass filter 910 is mixed by a mixer circuit 11 with a local oscillation signal of 10.6 GHz from a local oscillator circuit 913 and is frequency-converted to an intermediate frequency (IF) signal of the 1 GHz band (1100 MHz–2150 MHz). The output of mixer circuit 11 is amplified in an intermediate frequency amplifier 15 to have appropriate noise characteristic and gain characteristic and is output from an output terminal 34 via a capacitor 17.
Output terminal 34 is supplied with a DC voltage exceeding for example 10V from a tuner arranged indoors via a coaxial cable. This DC voltage is applied to a power supply circuit 936 via a choke coil 32. Power supply circuit 936 down-converts the DC voltage applied from terminal 34 and supplies the voltage as down-converted to a predetermined stabilized voltage to LNA 5, local oscillator circuit 913 and intermediate frequency amplifier 15.
FIG. 21 is a circuit diagram showing a detailed configuration of LNB 900 shown in FIG. 20.
Referring to FIG. 21, power supply circuit 936 includes a voltage regulator 38 converting a DC voltage VS1 applied via choke coil 32 to a stabilized DC voltage VO1, and a multi-output voltage regulator 940 receiving DC voltage VO1 to output DC voltages VO2–VO8 lower than DC voltage VO1 and serving as an operating point of each circuit.
DC voltage VO8 is applied to the gate of a transistor 4 connected to the antenna probe in feed horn 2 as a gate bias voltage. DC voltage VO7 is applied to the drain of transistor 4. The drain of transistor 4 is coupled to the gate of a transistor 8 by a capacitor 6. For example, HEMT (High Electron Mobility Transistor) or the like can be used as the transistor.
Transistor 8 has its gate receiving DC voltage VO6 as a gate bias voltage and has its drain receiving DC voltage VO5.
Local oscillator circuit 913 includes a resistor 18 having its one end receiving DC voltage VO4, a transistor 20 having its collector connected to the other end of resistor 18, having its emitter grounded, and having its base receiving a bias voltage Vbias, and a capacitor 16 for transmitting a signal at the collector of transistor 20.
Mixer circuit 11 includes a transistor 14 receiving at its gate a signal from bandpass filter 10 and a capacitor 24 for transmitting a signal output from the drain of transistor 14 to the next stage. Transistor 14 receives DC voltage VO3 as a gate bias voltage at its gate. Transistor 14 also receives DC voltage VO2 at its drain.
Intermediate frequency amplifier 15 includes an amplifier 26 at the first stage receiving a signal via capacitor 24, a capacitor 28 for transmitting an output of amplifier 26, and a transistor 30 receiving at its base a signal via capacitor 28. DC voltage VO1 output from voltage regulator 38 is supplied to the collector of transistor 30, and the operating current passes from the collector to the emitter of transistor 30, is fed from the emitter to amplifier 26, and flows from amplifier 26 to a ground node.
Conventionally, these circuit elements require respective individual circuit currents, the total of which is a circuit current (consumption current) for a product. In order to reduce the product consumption current, the circuit current for each element has to be reduced or some circuit has to be omitted. However, it is not easy to reduce the consumption current by removing the currently used circuits each having a necessary function.
Therefore, power consumption is reduced by cascading amplifier elements within intermediate frequency amplifier 15 as described above. A prior art document for reducing power consumption in this manner includes Japanese Patent Laying-Open No. 5-48480.
This prior art reduces the consumption current by directly applying a DC voltage, separately from the other units, from an external source to an intermediate frequency amplifier at a lower frequency.
A reduced power consumption is also required in LNB. In the configuration shown in FIG. 21, since DC voltage VO1 output by voltage regulator 38 is a voltage high enough for any of DC voltages VO2–VO8 output by the multi-output voltage regulator, the multi-output voltage regulator needs to down-convert DC voltage VO1 by a considerable potential difference to generate each of these voltages. The down-conversion of the voltage causes much power loss in multi-output voltage regulator 940.